The present invention relates generally to packaging technology for mounting a stack of a plurality of semiconductor elements to form a semiconductor device, and more particularly to such a semiconductor device comprising semiconductor elements that can be mounted with high mounting efficiency.
With the recent requirements for reducing the size and weight of and improving the operating performance of electronic and electrical apparatuses, an improvement in the mounting density is now increasingly strongly demanded for semiconductor parts. In an effort to comply with such needs, researches and studies for reducing the size, weight and thickness of a package have been positively promoted up to now. Especially, a variety of improvements have hitherto been made on the structure of the semiconductor package too, so that large chips can be accommodated in a package that is as small as possible. A package structure for semiconductor parts is commonly widely known. In this known package structure, a semiconductor element is fixed by the use of an electrically conductive adhesive to a die-pad part of a lead frame, and, after wire bonding inner leads of the lead frame to the electrodes on the surface of the semiconductor element, the peripheral part of the semiconductor element is sealed by the use of an encapsulant.
The needs for packaging semiconductor parts with a high mounting density becomes recently increasingly stronger, and a package of the LOC (lead on chip) type is known as a new package structure. In this known package, a semiconductor element is directly fixed to inner leads of a lead frame having no die-pad part, and, after wire bonding the inner leads of the lead frame to the electrodes on the surface of the semiconductor element, the peripheral part of the semiconductor element is sealed by the use of an encapsulant. (Such a package is described in a magazine entitled "Nikkei Microdevice", February issue, 1991, pages 89-97.)
Also, a method called TAB (tape automated bonding) or a method called TSOP (thin small outline package) in which a plurality of thin packages are mounted in a stacked relation is known. (Such a method is described in "Nikkei Microdevice", April issue, 1992, page 51.) In addition, a method of sealing a plurality of chips in a single package by an encapsulant is also known. (Such a method is described in "Nikkei Microdevice", April issue, 1991, page 80.)
Especially, a method of connecting a plurality of semiconductor elements by the use of filmy leads and pins (as disclosed in JP-A-61-32560) and a method of connecting a plurality of semiconductor elements by the use of a wiring board disposed along one of the side surfaces of the elements (as disclosed in JP-A-62-293749) are known as a technique for stacking a plurality of semiconductor elements.
By various modes of contrivance applied to the package structure as described above, the efficiency of mounting a plurality of semiconductor elements in a package can be greatly improved as compared to the case of the use of the prior art package. However, in spite of such an improvement in the mounting efficiency for the package itself, the mounting efficiency for the semiconductor device as a whole has not necessarily been still satisfactory. This is because, for example, a frame is inevitably required for fixing stacked packages or for establishing electrical connections with other elements. Also, because all of outer leads extending from the individual packages are joined as required to be combined or reshaped into a single outer lead to be connected to a printed wiring board by soldering, the area required for mounting the chips becomes considerably larger than the projected area of the chips.
Further, because the packaged semiconductor elements are connected on the wiring board, the number of connection points requiring soldering, wire bonding, etc. is inevitably increased, resulting in an undesirably long wiring distance between the electrodes of one of the semiconductor elements and those of another semiconductor element. This requirement has also given rise to an undesirable increase in the wiring resistance. Further, the method of stacking a plurality of chips and accommodating the stacked chips in a single package has not been satisfactory in that the package size becomes larger than the chip size, and the number of chips that can be stacked is also limited. With such a structure too, it is apparent that the increase in the distance required for wiring leads inevitably to degradation of the structural reliability and also lowering of the overall electrical response speed of the circuit.
When the aforementioned method of stacking a plurality of semiconductor elements in a package is employed, the problem regarding the size of the package may be solved. In this method, for example, filmy leads led out from the peripheral part of each of the semiconductor elements are used for establishing electrical connections between the semiconductor elements by pins connected to the individual filmy leads. Because the pins which are not integral with the filmy leads extend in the direction of stacking the semiconductor elements, the electrical connections between the semiconductor elements can be conveniently achieved, and the electrical distance of the connecting wiring can be shortened. However, this structural arrangement requires many connection points connecting the electrodes of one of the semiconductor elements to those of another semiconductor element by the filmy leads, and, from this requirement too, the resultant structure has also the problem in regard to the electrical reliability.
In the case of the aforementioned method in which a wiring board is disposed along one of the side surfaces of semiconductor elements for electrically connecting these semiconductor elements (as disclosed in JP-A-62-293749), the semiconductor elements are inevitably adversely affected by the heat generated during operation of the semiconductor elements thereby causing expansion and contraction of the semiconductor elements. This is because the semiconductor elements are firmly fixed together by the wiring board and have no operational flexibility.